Demonstration of low-overhead quantum error correction codes
Ke Wang, Zhide Lu, Chuanyu Zhang, Gongyu Liu, Jiachen Chen, Yanzhe Wang, Yaozu Wu, Shibo Xu, Xuhao Zhu, Feitong Jin, Yu Gao, Ziqi Tan, Zhengyi Cui, Ning Wang, Yiren Zou, Aosai Zhang, Tingting Li, Fanhao Shen, Jiarun Zhong, Zehang Bao, Zitian Zhu, Yihang Han, Yiyang He

TL;DR
This paper demonstrates low-overhead quantum error correction codes on a superconducting processor, showing promising results for scalable fault-tolerant quantum computing with efficient syndrome extraction and reduced resource overhead.
Contribution
The authors experimentally implement two low-overhead quantum LDPC codes on a superconducting processor, showcasing scalable error correction with long-range couplers and efficient syndrome measurement.
Findings
Achieved logical error rates of ~8.9% and ~7.8% per cycle for two codes.
Demonstrated simultaneous measurement of nonlocal stabilizers.
Validated feasibility of implementing qLDPC codes on superconducting hardware.
Abstract
Quantum computers hold the potential to surpass classical computers in solving complex computational problems. However, the fragility of quantum information and the error-prone nature of quantum operations make building large-scale, fault-tolerant quantum computers a prominent challenge. To combat errors, pioneering experiments have demonstrated a variety of quantum error correction codes. Yet, most of these codes suffer from low encoding efficiency, and their scalability is hindered by prohibitively high resource overheads. Here, we report the demonstration of two low-overhead quantum low-density parity-check (qLDPC) codes, a distance-4 bivariate bicycle code and a distance-3 qLDPC code, on our latest superconducting processor, Kunlun, featuring 32 long-range-coupled transmon qubits. Utilizing a two-dimensional architecture with overlapping long-range couplers, we demonstrate…
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