ARM SVE Unleashed: Performance and Insights Across HPC Applications on Nvidia Grace

TL;DR

This paper evaluates the performance and potential of ARM's SVE vector extension on HPC applications using hardware metrics, models, and classification tools to understand its maturity and optimize its use.

Contribution

It introduces new metrics, an adapted roofline model, and a decision tree to analyze and improve SVE utilization in HPC workloads on ARM Grace.

Findings

SVE effectively reduces instructions and boosts performance.

New metrics quantify SVE efficiency and impact.

The decision tree aids in classifying application performance with SVE.

Abstract

Vector architectures are essential for boosting computing throughput. ARM provides SVE as the next-generation length-agnostic vector extension beyond traditional fixed-length SIMD. This work provides a first study of the maturity and readiness of exploiting ARM and SVE in HPC. Using selected performance hardware events on the ARM Grace processor and analytical models, we derive new metrics to quantify the effectiveness of exploiting SVE vectorization to reduce executed instructions and improve performance speedup. We further propose an adapted roofline model that combines vector length and data elements to identify potential performance bottlenecks. Finally, we propose a decision tree for classifying the SVE-boosted performance in applications.