An Improved Approach to Estimate the Internal Resistance of a Battery During the HPPC Test
Prarthana Pillai, Smeet Desai, Krishna R. Pattipati, Balakumar Balasingam

TL;DR
This paper introduces a novel method for more accurate internal resistance estimation of batteries during HPPC tests by accounting for open circuit voltage changes, leading to significant error reduction.
Contribution
The paper presents a new resistance estimation approach that considers OCV variations without needing additional battery parameters, improving accuracy across various conditions.
Findings
Performance gain of 30% to over 250% in estimation accuracy.
Reduced overestimation of internal resistance by up to 20 mΩ.
Method applicable regardless of battery type, size, or temperature.
Abstract
This paper considers the problem of resistance estimation in electronic systems including battery management systems (BMS) and battery chargers. In typical applications, the battery resistance is obtained through an approximate method computed as the ratio of the voltage difference to the applied current excitation pulse or vice versa for admittance. When estimating the battery resistance, this approach ignores the change in the open circuit voltage (OCV) as a result of the excitation signal. In this paper, we formally demonstrate and quantify the effect of the OCV drop on the errors in internal resistance estimation. Then, we propose a novel method to accurately estimate the internal resistance by accounting for the change in OCV caused by the applied current excitation signal. The proposed approach is based on a novel observation model that allows one to estimate the effect of OCV…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsAdvanced Battery Technologies Research · Integrated Circuits and Semiconductor Failure Analysis · VLSI and Analog Circuit Testing
