Enhancing Reinforcement Learning for the Floorplanning of Analog ICs with Beam Search

TL;DR

This paper introduces a hybrid reinforcement learning and beam search method for analog IC floorplanning, significantly improving layout quality and flexibility without retraining, and matching state-of-the-art performance.

Contribution

It proposes a novel RL-beam search hybrid approach that enhances inference, generalization, and optimization in analog IC floorplanning tasks.

Findings

5-85% improvement in area, dead space, and wire length

Maintains RL agent's generalization and efficiency

Achieves performance comparable to state-of-the-art methods

Abstract

The layout of analog ICs requires making complex trade-offs, while addressing device physics and variability of the circuits. This makes full automation with learning-based solutions hard to achieve. However, reinforcement learning (RL) has recently reached significant results, particularly in solving the floorplanning problem. This paper presents a hybrid method that combines RL with a beam (BS) strategy. The BS algorithm enhances the agent's inference process, allowing for the generation of flexible floorplans by accomodating various objective weightings, and addressing congestion without without the need for policy retraining or fine-tuning. Moreover, the RL agent's generalization ability stays intact, along with its efficient handling of circuit features and constraints. Experimental results show approx. 5-85% improvement in area, dead space and half-perimeter wire length compared to a standard RL application, along with higher rewards for the agent. Moreover, performance and efficiency align closely with those of existing state-of-the-art techniques.