QiMeng-CPU-v2: Automated Superscalar Processor Design by Learning Data Dependencies

TL;DR

This paper introduces QiMeng-CPU-v2, an automated superscalar processor design method that leverages a novel data dependency learning model, significantly outperforming previous automated designs and rivaling human-designed processors.

Contribution

It presents the first automated approach for superscalar processor design using the State-BSD model to address inter-instruction data dependencies.

Findings

Achieves approximately 380× performance improvement over previous automated designs.

Comparable performance to human-designed processors like ARM Cortex A53.

Introduces a hardware-friendly model combining state-selector and state-speculator for dependency prediction.

Abstract

Automated processor design, which can significantly reduce human efforts and accelerate design cycles, has received considerable attention. While recent advancements have automatically designed single-cycle processors that execute one instruction per cycle, their performance cannot compete with modern superscalar processors that execute multiple instructions per cycle. Previous methods fail on superscalar processor design because they cannot address inter-instruction data dependencies, leading to inefficient sequential instruction execution. This paper proposes a novel approach to automatically designing superscalar processors using a hardware-friendly model called the Stateful Binary Speculation Diagram (State-BSD). We observe that processor parallelism can be enhanced through on-the-fly inter-instruction dependent data predictors, reusing the processor's internal states to learn the data dependency. To meet the challenge of both hardware-resource limitation and design functional correctness, State-BSD consists of two components: 1) a lightweight state-selector trained by the simulated annealing method to detect the most reusable processor states and store them in a small buffer; and 2) a highly precise state-speculator trained by the BSD expansion method to predict the inter-instruction dependent data using the selected states. It is the first work to achieve the automated superscalar processor design, i.e. QiMeng-CPU-v2, which improves the performance by about $380\times$ than the state-of-the-art automated design and is comparable to human-designed superscalar processors such as ARM Cortex A53.