Energy-Efficient NTT Sampler for Kyber Benchmarked on FPGA
Paresh Baidya, Rourab Paul, Vikas Srivastava, Sumit Kumar Debnath

TL;DR
This paper introduces Modified SampleNTT, a novel sampling algorithm for Kyber that reduces energy consumption and latency on FPGA by decreasing SHAKE-128 usage while maintaining randomness quality.
Contribution
The paper presents Modified SampleNTT, an efficient sampling method that outperforms existing algorithms in energy, latency, and success rate for lattice-based cryptography on FPGA.
Findings
33.14% energy reduction on FPGA
99.16% success rate with two SHAKE-128 squeezes
Maintains statistical randomness quality
Abstract
Kyber is a lattice-based key encapsulation mechanism selected for standardization by the NIST Post-Quantum Cryptography (PQC) project. A critical component of Kyber's key generation process is the sampling of matrix elements from a uniform distribution over the ring Rq . This step is one of the most computationally intensive tasks in the scheme, significantly impacting performance in low-power embedded systems such as Internet of Things (IoT), wearable devices, wireless sensor networks (WSNs), smart cards, TPMs (Trusted Platform Modules), etc. Existing approaches to this sampling, notably conventional SampleNTT and Parse-SPDM3, rely on rejection sampling. Both algorithms require a large number of random bytes, which needs at least three SHAKE-128 squeezing steps per polynomial. As a result, it causes significant amount of latency and energy. In this work, we propose a novel and…
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Taxonomy
TopicsEmbedded Systems Design Techniques · Low-power high-performance VLSI design · Parallel Computing and Optimization Techniques
