Hardware-Efficient Universal Linear Transformations for Optical Modes in the Synthetic Time Dimension

TL;DR

This paper presents a scalable, reconfigurable photonic processor using synthetic time dimension to implement linear transformations efficiently, reducing hardware complexity and enhancing robustness for quantum information tasks.

Contribution

Introduces a hardware-efficient synthetic time-domain photonic processor that significantly reduces component count for linear transformations and improves robustness against errors.

Findings

Achieves exponential reduction in hardware components for linear transformations.

Exceeds thresholds for universal cluster-state quantum computation.

Localization effects may enhance robustness to coherent errors.

Abstract

Recent progress in photonic information processing has spurred strong demand in scalable and reconfigurable photonic circuitry. Conventional spatially-meshed multi-port interferometers require a number of components growing quadratically with the system size, posing a fundamental scaling challenge ahead. Here, we introduce a hardware-efficient synthetic time-domain photonic processor that achieves at least an exponential reduction in hardware component count for implementing arbitrary linear transformations. The processor's dynamic connectivity allows systematic pruning, minimizing optical loss while preserving all-to-all connectivity. We benchmark our architecture on the task of boosted Bell state measurements -- a protocol essential for linear optical quantum computation, and show that it exceeds thresholds for universal cluster-state quantum computation under realistic hardware constraints. We link the device performance to the geometry of multi-photon transport, showing that localization effects from redundant, imperfect hardware may enhance robustness to coherent errors. Our design establishes a practical pathway toward near-term, scalable, and reconfigurable photonic processors in the synthetic time dimension.