Evaluation of CGRA Toolchains
Dominik Walter, Marita Halm, Daniel Seidel, Indrayudh Ghosh, Christian, Heidorn, Frank Hannig, J\"urgen Teich

TL;DR
This paper compares four CGRA toolchains for mapping loop programs, analyzing their performance and utilization, revealing strengths in simple kernels and challenges with complex loops.
Contribution
It provides a comparative analysis of different CGRA mapping toolchains, highlighting their performance and utilization issues across various loop complexities.
Findings
Most toolchains perform well on simple kernels like matrix multiplication.
Some toolchains struggle with complex loops such as triangular solvers.
CGRA mappers tend to underutilize available processing elements.
Abstract
Increasing demands for computing power also propel the need for energy-efficient SoC accelerator architectures. One class for such accelerators are so-called processor arrays, which typically integrate a two-dimensional mesh of interconnected processing elements (PEs). Such arrays are specifically designed to accelerate the execution of multidimensional nested loops by exploiting the intrinsic parallelism of such loops. Coarse-grained reconfigurable arrays (CGRAs) belong to this class of accelerator architectures. In this work, we analyze four toolchains for mapping loop programs onto CGRAs and compare the resulting mappings wrt. performance, i.e., latency. While most toolchains succeed in simpler kernels like general matrix multiplication, some struggle to find valid mappings for more complex loops like a triangular solver. Furthermore, we observe that the considered CGRA mappers…
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Taxonomy
TopicsEmbedded Systems Design Techniques · Parallel Computing and Optimization Techniques · Interconnection Networks and Systems
