A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications
Angelo Garofalo, Alessandro Ottaviano, Matteo Perotti, Thomas Benz,, Yvan Tortorella, Robert Balas, Michael Rogenmoser, Chi Zhang, Luca, Bertaccini, Nils Wistoff, Maicol Ciani, Cyril Koenig, Mattia Sinigaglia, Luca, Valente, Paul Scheffler, Manuel Eggimann, Matheus Cavalcante

TL;DR
This paper presents a 16nm heterogeneous SoC designed for AI-enhanced mixed-criticality edge applications, ensuring reliable, predictable, and energy-efficient execution within a sub-2W power budget.
Contribution
It introduces a reliable, time-predictable heterogeneous SoC with programmable accelerators and predictable resource access for mixed-criticality workloads.
Findings
Achieves tight upper bounds on critical task execution times.
Delivers 304.9 GOPS peak performance for AI acceleration.
Operates within 1.2W power envelope with high energy efficiency.
Abstract
Next-generation mixed-criticality Systems-on-chip (SoCs) for robotics, automotive, and space must execute mixed-criticality AI-enhanced sensor processing and control workloads, ensuring reliable and time-predictable execution of critical tasks sharing resources with non-critical tasks, while also fitting within a sub-2W power envelope. To tackle these multi-dimensional challenges, in this brief, we present a 16nm, reliable, time-predictable heterogeneous SoC with multiple programmable accelerators. Within a 1.2W power envelope, the SoC integrates software-configurable hardware IPs to ensure predictable access to shared resources, such as the on-chip interconnect and memory system, leading to tight upper bounds on execution times of critical applications. To accelerate mixed-precision mission-critical AI, the SoC integrates a reliable multi-core accelerator achieving 304.9 GOPS peak…
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Taxonomy
TopicsEmbedded Systems Design Techniques · Real-Time Systems Scheduling · Parallel Computing and Optimization Techniques
