DiffChip: Thermally Aware Chip Placement with Automatic Differentiation

TL;DR

DiffChip introduces a differentiable thermal-aware placement algorithm for chiplets that leverages automatic differentiation to optimize heat distribution and wirelength efficiently, improving over traditional methods.

Contribution

The paper presents a novel differentiable framework using automatic differentiation and physics-based thermal modeling for chiplet placement optimization.

Findings

Accelerates thermal-aware placement optimization.

Achieves better temperature control with gradient-based methods.

Outperforms traditional gradient-free approaches in scalability.

Abstract

Chiplets are modular integrated circuits that can be combined to form a larger system, offering flexibility and performance enhancements. However, their dense packing often leads to significant thermal management challenges, requiring careful floorplanning to ensure efficient heat distribution. To address thermal considerations, layout optimization algorithms concurrently minimize the total wirelength and the maximum temperature. However, these efforts employ gradient-free approaches, such as simulated annealing, which suffer from poor scaling and slow convergence. In this paper, we propose DiffChip, a chiplet placement algorithm based on automatic differentiation (AD). The proposed framework relies on a differentiable thermal solver that computes the sensitivity of the temperature map with respect to the positions of the chiplets. Regularization strategies for peak temperature, heat sources, and material properties enable end-to-end differentiability, allowing for gradient-based optimization. We apply DiffChip to optimize a layout where the total wirelength is minimized while keeping the maximum temperature below a desired threshold. By leveraging AD and physics-aware optimization, our approach accelerates the design process of microelectronic systems, exceeding traditional trial-and-error and gradient-free methods.