A Novel Quaternary Decoder Design Utilizing 32nm CMOS and GNRFET Technology for Enhanced High-Density Memory Applications

TL;DR

This paper introduces a quaternary decoder using GNRFET technology in 32nm CMOS, demonstrating improved efficiency and performance for high-density memory applications through comparative analysis.

Contribution

It presents a novel GNRFET-based quaternary decoder design and compares its power and delay characteristics with traditional CMOS implementations.

Findings

GNRFET decoder shows lower power consumption.

GNRFET decoder achieves reduced latency.

Enhanced performance in high-density memory applications.

Abstract

Multi-Valued Logic (MVL) has more than one logic level defined to represent data whereas binary logic has 2 logic levels. It has been shown that the MVL circuits use the circuit resources more effectively at different voltage levels with less circuitry and greater efficiency. Recently, graphene nano-ribbon field effect transistor (GNRFET) has drawn a lot of interest due to its higher electron mobility. This paper presents quaternary decoder implemented in GNRFET and analyzed latency, power, performance etc. also compared the power and delay characteristics of the design implemented both in CMOS and Graphene Nano Ribbon Field Effect Transistor (GNRFET) in the 32nm technology node.