SoK: State of the time: On Trustworthiness of Digital Clocks

TL;DR

This paper systematically analyzes the security vulnerabilities of digital clocks and timing infrastructure, revealing overlooked attack surfaces and flaws in trusted architectures, and proposes a hardware-software co-design solution to enhance trustworthiness.

Contribution

It provides a comprehensive analysis of timing stack vulnerabilities, uncovers new attack surfaces, and proposes a novel hardware-software co-design approach for secure timing.

Findings

Identified new attack surfaces in physical timing components and on-device timekeeping.

Showed flaws in emerging trusted timing architectures that threaten system security.

Suggested a hardware-software co-design approach to improve timing trustworthiness.

Abstract

Despite the critical role of timing infrastructure in enabling essential services, from public key infrastructure and smart grids to autonomous navigation and high-frequency trading, modern timing stacks remain highly vulnerable to malicious attacks. These threats emerge due to several reasons, including inadequate security mechanisms, the timing architectures unique vulnerability to delays, and implementation issues. In this paper, we aim to obtain a holistic understanding of the issues that make the timing stacks vulnerable to adversarial manipulations, what the challenges are in securing them, and what solutions can be borrowed from the research community to address them. To this end, we perform a systematic analysis of the security vulnerabilities of the timing stack. In doing so, we discover new attack surfaces, i.e., physical timing components and on-device timekeeping, which are often overlooked by existing research that predominantly studies the security of time synchronization protocols. We also show that the emerging trusted timing architectures are flawed and risk compromising wider system security, and propose an alternative design using hardware-software co-design.