An Efficient Iterative Algorithm for Qubit Mapping via Layer-Weight Assignment and Search Space Reduction

TL;DR

HAIL is an efficient iterative qubit mapping algorithm that minimizes SWAP gates in quantum circuits by combining layer-weight assignment, subgraph isomorphism, and a two-stage search, leading to significant resource savings.

Contribution

The paper introduces HAIL, a novel qubit mapping method that integrates layer-weight assignment with search space reduction and iterative refinement to optimize quantum circuit execution.

Findings

Reduces additional SWAP gates by 20.62% on IBM Q20.

Effectively decreases algorithm runtime and resource consumption.

Demonstrates improved performance on Google Sycamore architecture.

Abstract

Current quantum devices support interactions only between physically adjacent qubits, preventing quantum circuits from being directly executed on these devices. Therefore, SWAP gates are required to remap logical qubits to physical qubits, which in turn increases both quantum resource consumption and error rates. To minimize the insertion of additional SWAP gates, we propose HAIL, an efficient iterative qubit mapping algorithm. Leveraging the inherent parallelism in quantum circuits, a new layer-weight assignment method is integrated with subgraph isomorphism to derive an optimal initial qubit mapping. Moreover, we present a two-stage SWAP sequence search algorithm that effectively identifies the most efficient SWAP sequence by distilling feasible SWAP sequences at different stages. The whole qubit mapping algorithm is then refined through a few iterative bidirectional traversals, further reducing the number of SWAP gates required. Experimental results on the IBM Q20 architecture and various benchmarks show that HAIL-3 reduces the number of additional gates inserted in the $\mathcal{B}_{23}$ by 20.62\% compared to state-of-the-art algorithms. Moreover, we propose a partially extended SWAP sequence strategy combined with HAIL to reduce its time complexity, with experiments on the sparsely connected Google Sycamore architecture demonstrating reductions in both algorithm runtime and additional SWAP gates.