Towards Efficient LUT-based PIM: A Scalable and Low-Power Approach for Modern Workloads
Bahareh Khabbazan, Marc Riera, Antonio Gonz\'alez

TL;DR
This paper introduces Lama, a LUT-based in-memory processing architecture that significantly reduces energy and improves performance for deep learning workloads by enabling efficient SIMD operations within DRAM, and extends it with LamaAccel for accelerated inference.
Contribution
Lama is a novel LUT-based PuM architecture supporting 8-bit SIMD operations with minimal area overhead, and LamaAccel leverages it for high-efficiency inference acceleration.
Findings
Lama achieves 8.5x performance and 6.9x energy efficiency improvements over state-of-the-art PuM.
Lama outperforms CPU by 3.8x in performance and 8x in energy efficiency for bulk 8-bit multiplication.
LamaAccel reduces energy by up to 19.2x and speeds up inference by up to 9.8x over GPU/TPU.
Abstract
Data movement in memory-intensive workloads, such as deep learning, incurs energy costs that are over three orders of magnitude higher than the cost of computation. Since these workloads involve frequent data transfers between memory and processing units, addressing data movement overheads is crucial for improving performance. Processing-using-memory (PuM) offers an effective solution by enabling in-memory computation, thereby minimizing data transfers. In this paper we propose Lama, a LUT-based PuM architecture designed to efficiently execute SIMD operations by supporting independent column accesses within each mat of a DRAM subarray. Lama exploits DRAM's mat-level parallelism and open-page policy to significantly reduce the number of energy-intensive memory activation (ACT) commands, which are the primary source of overhead in most PuM architectures. Unlike prior PuM solutions, Lama…
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Taxonomy
TopicsAdvancements in Semiconductor Devices and Circuit Design · Semiconductor materials and devices · Quantum-Dot Cellular Automata
