Enhanced Non-Ohmic Drain Resistance of 2DFETs at Cryogenic Temperature

TL;DR

This paper investigates the non-ohmic drain resistance behavior of 2D material FETs at cryogenic temperatures, revealing the role of asymmetric contact properties and tunneling effects in current suppression.

Contribution

It provides a detailed analysis of the mechanisms behind non-ohmic behavior in 2DFETs at low temperatures, emphasizing the impact of contact metal selection and barrier height.

Findings

Asymmetric current reduction causes non-ohmic behavior at cryogenic temperatures.

Carrier tunneling and diffusion lead to current suppression under low bias.

Metal-semiconductor contact properties vary with temperature, affecting device performance.

Abstract

The contact issue for two-dimensional (2D) materials-based field-effect transistors (FETs) has drawn enormous attention in recent years. Although ohmic behavior is achieved at room temperature, the drain current of 2DFETs shifts from ohmic to non-ohmic behavior at cryogenic temperatures. In this work, we demonstrate that the shift is attributed to the asymmetric current reduction at the metal-semiconductor contact at low temperature. Under low drain bias, carriers tunnel from the source to the channel but diffuse to the drain side due to the channel-to-drain barrier, resulting in the current suppression. By studying the property of ohmic metal-semiconductor contact at different temperatures, we analyzed the mechanisms behind this phenomenon and the dependence on metal-to-semiconductor barrier height. The work opens the semiconductor physics of 2D material contact at cryogenic temperature and the importance of contact metal selection in the development of 2DFET at cryogenic temperature.