TL;DR
DH-TRNG is a novel dynamic hybrid true random number generator that achieves ultra-high throughput and superior area-energy efficiency, passing standard randomness tests without post-processing.
Contribution
It introduces a portable, high-performance TRNG architecture that significantly improves throughput and energy efficiency over existing designs.
Findings
Achieves up to 670 Mbps throughput on FPGA.
Uses only 8 slices for high performance.
Outperforms state-of-the-art TRNGs in throughput per slice power.
Abstract
As a vital security primitive, the true random number generator (TRNG) is a mandatory component to build roots of trust for any encryption system. However, existing TRNGs suffer from bottlenecks of low throughput and high area-energy consumption. In this work, we propose DH-TRNG, a dynamic hybrid TRNG circuitry architecture with ultra-high throughput and area-energy efficiency. Our DH-TRNG exhibits portability to distinct process FPGAs and passes both NIST and AIS-31 tests without any post-processing. The experiments show it incurs only 8 slices with the highest throughput of 670Mbps and 620Mbps on Xilinx Virtex-6 and Artix-7, respectively. Compared to the state-of-the-art TRNGs, our proposed design has the highest Throughput/SlicesPower with a 2.63 times increase.
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