Implementation of Quantum Fourier Transform and Quantum Hashing for a Quantum Device with Arbitrary Qubits Connection Graphs

TL;DR

This paper introduces a generic method for constructing quantum circuits for quantum Fourier transform and quantum hashing that accommodates arbitrary qubit connection graphs, optimizing gate count for complex quantum devices.

Contribution

The paper presents a novel heuristic algorithm for designing quantum circuits on arbitrary connected graphs, minimizing CNOT gates, applicable to various quantum device architectures.

Findings

The heuristic algorithm runs in O(n^5) time, providing efficient circuit construction.

The method produces circuits with similar CNOT counts compared to optimized graphs.

It enables circuit design for complex qubit connection graphs beyond linear architectures.

Abstract

In the paper, we consider quantum circuits for Quantum fingerprinting (quantum hashing) and quantum Fourier transform (QFT) algorithms. Quantum fingerprinting (quantum hashing) is a well-known technique for comparing large objects using small images. The QFT algorithm is a very popular technique used in many algorithms. We present a generic method for constructing quantum circuits for these algorithms for quantum devices with restrictions. Many quantum devices (for example, based on superconductors) have restrictions on applying two-qubit gates. The restrictions are presented by a qubits connection graph. Typically, researchers consider only the linear nearest neighbor (LNN) architecture, but current devices have more complex graphs. We present a method for arbitrary connected graphs that minimizes the number of CNOT gates in the circuit. The heuristic version of the method is fast enough and works with $O(n^5)$ time complexity, where $n$ is the number of qubits. The certain version of the algorithm has an exponential time complexity that is $O(n^22^n)$. We compare quantum circuits built by our algorithm with quantum circuits optimized for specific graphs that are Linear-nearest-neighbor (LNN) architecture, ``sun'' (a cycle with tails, presented by 16-qubit IBMQ device) and ``two joint suns'' (two joint cycles with tails, presented by 27-qubit IBMQ device). Our generic method gives similar results with little bit more CNOT gates. At the same time, our method allows us to construct a circuit for arbitrary connected graphs.