Model-checking real-time systems: revisiting the alternating automaton route
Patricia Bouyer, B Srivathsan, Vaishnavi Vishwanath

TL;DR
This paper revisits the automaton-based approach to model-checking real-time systems by developing zone-based methods for alternating timed automata, improving efficiency and applicability for certain logical fragments.
Contribution
It introduces a zone-based emptiness algorithm for 1-clock alternating timed automata, including a deactivation operation and bounded variable generation for specific MTL fragments.
Findings
Developed a zone graph exploration method for 1-ATA emptiness checking.
Proposed an entailment check algorithm with quadratic complexity under certain conditions.
Established NP-hardness of the general entailment check.
Abstract
Alternating timed automata (ATA) are an extension of timed automata, that are closed under complementation and hence amenable to logic-to-automata translations. Several timed logics, including Metric Temporal Logic (MTL), can be converted to equivalent 1-clock ATAs (1-ATAs). Satisfiability of an MTL formula reduces to checking emptiness of a 1-ATA. A straightforward modification of the 1-ATA emptiness algorithm can be applied for model-checking timed automata models against 1-ATA specifications. However, existing emptiness algorithms for 1-ATA proceed by an extended region construction, and are not suitable for implementations. Our goal in this work is to initiate the study of zone-based methods directly for 1-ATAs. We first introduce a deactivation operation on the 1-ATA syntax to allow an explicit deactivation of the clock in transitions. Using the deactivation operation, we improve…
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Taxonomy
TopicsReal-Time Systems Scheduling · Formal Methods in Verification · Embedded Systems Design Techniques
