Accelerating Recommender Model ETL with a Streaming FPGA-GPU Dataflow
Yu Zhu, Wenqi Jiang, Piyumi Jasin Pathiranage, Yongjun He, Gustavo Alonso

TL;DR
This paper introduces PipeRec, a hardware-accelerated ETL engine using FPGA-GPU dataflows that significantly speeds up data preprocessing for recommender models, reducing training time and operational costs.
Contribution
PipeRec co-designs an FPGA-GPU dataflow-based ETL engine with a training-aware abstraction, enabling high throughput and efficient GPU utilization in recommender system training pipelines.
Findings
ETL throughput increased by over 10x compared to CPU pipelines.
Achieved up to 17x faster ETL than state-of-the-art GPU systems.
Reduced end-to-end training time to less than 10% of CPU-GPU pipelines.
Abstract
The real-time performance of recommender models depends on the continuous integration of massive volumes of new user interaction data into training pipelines. While GPUs have scaled model training throughput, the data preprocessing stage - commonly expressed as Extract-Transform-Load (ETL) pipelines - has emerged as the dominant bottleneck. Production systems often dedicate clusters of CPU servers to support a single GPU node, leading to high operational cost. To address this issue, we present PipeRec, a hardware-accelerated ETL engine co-designed with online recommender model training. PipeRec introduces a training-aware ETL abstraction that exposes freshness, ordering, and batching semantics while compiling software-defined operators into reconfigurable FPGA dataflows and overlaps ETL with GPU training to maximize utilization under I/O constraints. To eliminate CPU bottlenecks,…
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Taxonomy
TopicsCaching and Content Delivery · Recommender Systems and Techniques · IoT and Edge/Fog Computing
