SkyByte: Architecting an Efficient Memory-Semantic CXL-based SSD with OS and Hardware Co-design
Haoyang Zhang, Yuqi Xue, Yirui Eric Zhou, Shaobo Li, Jian Huang

TL;DR
SkyByte is a co-designed OS and SSD architecture that significantly improves performance and reduces unnecessary flash I/O traffic in CXL-based SSDs by addressing latency and granularity challenges.
Contribution
It introduces a holistic OS-SSD co-design with novel cache architecture, context switch optimizations, and adaptive page migration for efficient CXL-SSD operation.
Findings
SkyByte outperforms existing CXL-SSD by 6.11X in performance.
Reduces flash I/O traffic by 23.08X.
Achieves 75% of ideal performance with unlimited host DRAM.
Abstract
The CXL-based solid-state drive (CXL-SSD) provides a promising approach towards scaling the main memory capacity at low cost. However, the CXL-SSD faces performance challenges due to the long flash access latency and unpredictable events such as garbage collection in the SSD device, stalling the host processor and wasting compute cycles. Although the CXL interface enables the byte-granular data access to the SSD, accessing flash chips is still at page granularity due to physical limitations. The mismatch of access granularity causes significant unnecessary I/O traffic to flash chips, worsening the suboptimal end-to-end data access performance. In this paper, we present SkyByte, an efficient CXL-based SSD that employs a holistic approach to address the aforementioned challenges by co-designing the host operating system (OS) and SSD controller. To alleviate the long memory stall when…
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Taxonomy
TopicsAdvanced Data Storage Technologies · Distributed and Parallel Computing Systems · Cellular Automata and Applications
