AR-SFQ: Asynchronous Reset Library Using {\alpha}-Cell Design
Yasemin Kopur, Beyza Zeynep Ucpinar, Mustafa Altay Karamuftuoglu,, Sasan Razmkhah, Massoud Pedram

TL;DR
This paper introduces AR-SFQ, an asynchronous RSFQ cell library with {\
Contribution
It presents the {\
Findings
Demonstrates reliability through simulations.
Reduces clock network complexity.
Enables scalable high-performance circuits.
Abstract
Rapid Single Flux Quantum (RSFQ) circuits are the most evolved superconductor logic family. However, the need to clock each cell and the deep pipeline causes a complex clock network with a large skew. This results in lower throughput and high latency in RSFQ. This work introduces an asynchronous RSFQ cell library that incorporates the {\alpha}-cell, enabling bidirectional signal paths in RSFQ circuits. The {\alpha}-cell mitigates the need for a large clock network by allowing reverse signal flow, minimizing routing, and enabling compact circuit designs. We demonstrate the library's reliability and efficiency by analog simulations and using in-house optimization tools. The asynchronous reset RSFQ (AR-SFQ) will enable efficient implementation of scalable, high-performance computing frameworks, such as state machines, neuromorphic computing, and higher fan-in circuits.
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Taxonomy
TopicsLow-power high-performance VLSI design · VLSI and FPGA Design Techniques · Parallel Computing and Optimization Techniques
