Demonstrating quantum error mitigation on logical qubits

TL;DR

This paper demonstrates a practical quantum error mitigation technique called zero-noise extrapolation on superconducting processors, effectively reducing logical errors in error correction circuits and advancing reliable quantum computing.

Contribution

It experimentally applies zero-noise extrapolation to logical qubits, showing its effectiveness in suppressing errors in fault-tolerant quantum circuits.

Findings

Universal reduction in logical errors across various circuits

Effective error mitigation in multi-round error correction

Performance remains strong as circuit depth increases

Abstract

A long-standing challenge in quantum computing is developing technologies to overcome the inevitable noise in qubits. To enable meaningful applications in the early stages of fault-tolerant quantum computing, devising methods to suppress post-correction logical failures is becoming increasingly crucial. In this work, we propose and experimentally demonstrate the application of zero-noise extrapolation, a practical quantum error mitigation technique, to error correction circuits on state-of-the-art superconducting processors. By amplifying the noise on physical qubits, the circuits yield outcomes that exhibit a predictable dependence on noise strength, following a polynomial function determined by the code distance. This property enables the effective application of polynomial extrapolation to mitigate logical errors. Our experiments demonstrate a universal reduction in logical errors across various quantum circuits, including fault-tolerant circuits of repetition and surface codes. We observe a favorable performance in multi-round error correction circuits, indicating that this method remains effective when the circuit depth increases. These results advance the frontier of quantum error suppression technologies, opening a practical way to achieve reliable quantum computing in the early fault-tolerant era.