Optimizing compilation of error correction codes for 2xN quantum dot arrays and its NP-hardness
Anthony Micciche, Feroz Ahmed Mian, Anasua Chatterjee, Andrew McGregor, and Stefan Krastanov

TL;DR
This paper develops heuristic methods for optimizing error correction circuit compilation in 2xN quantum dot arrays, demonstrating minimal shuttles for certain codes and proving NP-hardness for the general case.
Contribution
It introduces heuristic compilation techniques for CSS error-correcting codes in quantum dot arrays and proves the NP-hardness of minimizing shuttle operations.
Findings
Heuristic methods reduce shuttles for CSS codes.
Column-regular qLDPC codes achieve minimal shuttles equal to column weight.
NP-hardness of shuttle minimization for general codes is proven.
Abstract
The ability to physically move qubits within a register allows the design of hardware-specific error-correction codes, which can achieve fault-tolerance while respecting other constraints. In particular, recent advancements have demonstrated the shuttling of electron and hole spin qubits through a quantum dot array with high fidelity. It is therefore timely to explore error correction architectures consisting merely of two parallel quantum dot arrays, an experimentally validated architecture compatible with classical wiring and control constraints. Upon such an architecture, we develop a suite of heuristic methods for compiling any Calderbank-Shor-Steane (CSS) error-correcting code's syndrome-extraction circuit to run with a reduced number of shuttling operations. We demonstrate how column-regular qLDPC codes can be compiled in a provably minimal number of shuttles that is exactly equal…
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