Efficient Quantum Circuit Compilation for Near-Term Quantum Advantage
Yuchen Guo, Shuo Yang

TL;DR
This paper introduces an approximate quantum circuit compilation method that reduces circuit depth and noise susceptibility, enabling more practical quantum computations on near-term noisy hardware.
Contribution
The paper presents a novel circuit compilation approach using brick-wall layouts with optimized gates, improving depth reduction and scalability for near-term quantum devices.
Findings
High compression rates for time evolution and Fourier circuits
Experiments on IBM hardware demonstrate significant depth reduction
Optimal circuit depth is independent of system size
Abstract
Quantum noise in real-world devices poses a significant challenge in achieving practical quantum advantage, since accurately compiled and executed circuits are typically deep and highly susceptible to decoherence. To facilitate the implementation of complex quantum algorithms on noisy hardware, we propose an approximate method for compiling target quantum circuits into brick-wall layouts. This new circuit design consists of two-qubit CNOT gates that can be directly implemented on real quantum computers, in conjunction with optimized one-qubit gates, to approximate the essential dynamics of the original circuit while significantly reducing its depth. Our approach is evaluated through numerical simulations of time-evolution circuits for the critical Ising model, quantum Fourier transformation, and Haar-random quantum circuits, as well as experiments on IBM quantum platforms. By accounting…
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