Design of a 6-bit Threshold Inverter Quantization (TIQ) Flash Analog to Digital Converter (ADC)

TL;DR

This paper presents a 6-bit flash ADC design using threshold inverter quantization (TIQ) comparators, achieving high speed and low power consumption with a CMOS implementation and software simulation.

Contribution

The paper introduces a novel 6-bit flash ADC architecture based on TIQ comparators, eliminating resistors and op-amp comparators for improved efficiency.

Findings

Power consumption of 6.25 mW at 10 kHz input

Propagation delay of 1.07 microseconds at 10 kHz

Power consumption of 12.12 mW at 10 MHz input

Abstract

An ADC is used to convert analog signals into binary signals. Compared with many other types of ADCs, flash converters are incredibly quick. A typical Flash ADC consists of 2n resistors, 2n-1 op-amp comparators, and an encoder which requires more area. The resistors and comparators can be eliminated by using threshold inverter quantization (TIQ) comparators. As a voltage comparator, TIQ technique uses two cascaded CMOS inverters. So that there will be no variation in the fabrication process, and temperature. A 6-bit flash ADC based on threshold inverter quantization (TIQ) comparator was designed and software implementation was performed employing a fat tree encoder with 0.25 micrometer CMOS technology. The design consists of 2n-1 TIQ comparator arrays, a gain booster, a 1-out-of-n code generator, and a fat tree encoder. This TIQ flash ADC is simulated with the Tanner EDA Tool. Here the supply voltage is 2.5 V, input frequency of 10 kHz and 10 MHz. The power consumption of the ADC is 6.25 mW, and the propagation delay is 1.07 microseconds for 10 kHz input frequency. For 10 MHz input frequency, power consumption is 12.12 mW and propagation delay is 947.14 ms.