Exact Decoding of Repetition Code under Circuit Level Noise

TL;DR

This paper introduces an exact, optimal decoding algorithm for repetition codes under circuit level noise, improving error threshold detection and revealing decoding-related error floors in quantum memory experiments.

Contribution

It provides the first exact solution and polynomial-time maximum likelihood decoding algorithm for repetition codes under circuit level noise, enhancing quantum error correction accuracy.

Findings

Uncovered the exact error threshold for depolarizing noise.

Revealed decoding algorithm contributed to error floors in quantum memory.

Achieved lower logical error rates on a 72-qubit superconducting chip.

Abstract

Repetition code forms a fundamental basis for quantum error correction experiments. To date, it stands as the sole code that has achieved large distances and extremely low error rates. Its applications span the spectrum of evaluating hardware limitations, pinpointing hardware defects, and detecting rare events. However, current methods for decoding repetition codes under circuit level noise are suboptimal, leading to inaccurate error correction thresholds and introducing additional errors in event detection. In this work, we establish that repetition code under circuit level noise has an exact solution, and we propose an optimal maximum likelihood decoding algorithm called planar. The algorithm is based on the exact solution of the spin glass partition function on planar graphs and has polynomial computational complexity. Through extensive numerical experiments, we demonstrate that our algorithm uncovers the exact threshold for depolarizing noise and realistic superconductor SI1000 noise. Furthermore, we apply our method to analyze data from recent quantum memory experiments conducted by Google Quantum AI, revealing that part of the error floor was attributed to the decoding algorithm used by Google. Finally, we implemented the repetition code quantum memory on superconducting systems with a 72-qubit quantum chip lacking reset gates, demonstrating that even with an unknown error model, the proposed algorithm achieves a significantly lower logical error rate than the matching-based algorithm.