GRAMC: General-purpose and reconfigurable analog matrix computing architecture

TL;DR

This paper introduces GRAMC, a reconfigurable analog matrix computing architecture that enables versatile, in-memory matrix operations by dynamically adjusting connections, supported by a hybrid system for broad application use.

Contribution

The work presents a novel reconfigurable AMC macro that allows universal matrix processing, overcoming the fixed topology limitation of prior AMC circuits.

Findings

Achieves reconfigurable matrix computation with flexible connection topology.

Integrates on-chip write-verify scheme for reliable analog memory operations.

Demonstrates applicability across various matrix computation tasks.

Abstract

In-memory analog matrix computing (AMC) with resistive random-access memory (RRAM) represents a highly promising solution that solves matrix problems in one step. However, the existing AMC circuits each have a specific connection topology to implement a single computing function, lack of the universality as a matrix processor. In this work, we design a reconfigurable AMC macro for general-purpose matrix computations, which is achieved by configuring proper connections between memory array and amplifier circuits. Based on this macro, we develop a hybrid system that incorporates an on-chip write-verify scheme and digital functional modules, to deliver a general-purpose AMC solver for various applications.