RH: An Architecture for Redesigning Quantum Circuits on Quantum Hardware Devices

TL;DR

This paper introduces a novel architecture using EQ-GAN with a random circuit module to enable large-scale quantum circuit redesign on hardware, improving optimization and validation in NISQ devices.

Contribution

The architecture extends EQ-GAN capabilities to unitary learning with a theoretical proof and practical enhancements, applied to circuit optimization tasks.

Findings

Successful application to circuit equivalence checking

Effective in variational quantum circuit reconstruction

Demonstrated feasibility on classical and NISQ hardware

Abstract

In this paper we present an architecture that enables the redesign of large-scale quantum circuits on quantum hardware based on the entangling quantum generative adversarial network (EQ-GAN). Specifically, by prepending a random quantum circuit module to the standard EQ-GAN framework, we extend its capability from quantum state learning to unitary transformation learning. The completeness of this architecture is theoretically proved. Moreover, an efficient local random circuit is proposed, which significantly enhances the practicality of our architecture. For concreteness, we apply this architecture to three crucial applications in circuit optimization, including the equivalence checking of (non-) parameterized circuits, as well as the variational reconstruction of quantum circuits. The feasibility of our approach is demonstrated by excellent results in both classical and noisy intermediate-scale quantum (NISQ) hardware implementations. We believe our work will facilitate the implementation and validation of the advantages of quantum algorithms.