Memory-Centric Computing: Recent Advances in Processing-in-DRAM

TL;DR

This paper reviews recent advances in processing-in-DRAM, highlighting techniques that enable computation within DRAM chips to reduce data movement, improve performance, and energy efficiency, with experimental validation on commercial chips.

Contribution

It introduces new techniques for DRAM modification, demonstrates functional bulk-bitwise operations on commercial DRAM, and proposes designs to enhance access efficiency in processing-in-DRAM.

Findings

Commercial DRAM chips can perform bulk-bitwise operations without modifications.

New DRAM designs improve access granularity and efficiency.

Memory-centric computing significantly enhances system performance and energy efficiency.

Abstract

Memory-centric computing aims to enable computation capability in and near all places where data is generated and stored. As such, it can greatly reduce the large negative performance and energy impact of data access and data movement, by 1) fundamentally avoiding data movement, 2) reducing data access latency & energy, and 3) exploiting large parallelism of memory arrays. Many recent studies show that memory-centric computing can largely improve system performance & energy efficiency. Major industrial vendors and startup companies have recently introduced memory chips with sophisticated computation capabilities. Going forward, both hardware and software stack should be revisited and designed carefully to take advantage of memory-centric computing. This work describes several major recent advances in memory-centric computing, specifically in Processing-in-DRAM, a paradigm where the operational characteristics of a DRAM chip are exploited and enhanced to perform computation on data stored in DRAM. Specifically, we describe 1) new techniques that slightly modify DRAM chips to enable both enhanced computation capability and easier programmability, 2) new experimental studies that demonstrate the functionally-complete bulk-bitwise computational capability of real commercial off-the-shelf DRAM chips, without any modifications to the DRAM chip or the interface, and 3) new DRAM designs that improve access granularity & efficiency, unleashing the true potential of Processing-in-DRAM.