FPGA Implementation of Low-Power Multiplierless Pre-Processing Free Chromatic Dispersion Equalizer

TL;DR

This paper introduces a low-power FPGA-based chromatic dispersion equalizer that operates in the time domain without pre-processing or multipliers, significantly reducing energy consumption over long-distance optical communication.

Contribution

It presents a novel multiplierless, pre-processing free design for chromatic dispersion equalization implemented on FPGA, achieving substantial energy savings.

Findings

Up to 54.3% energy savings over 80-1280 km

Simple and low-power design

Effective in long-distance optical links

Abstract

We present a novel time-domain chromatic dispersion equalizer, implemented on FPGA, eliminating pre-processing and multipliers, achieving up to 54.3% energy savings over 80-1280 km with a simple, low-power design.