Benchmarking stochasticity behind reproducibility: denoising strategies in Ta$_2$O$_5$ memristors

TL;DR

This paper introduces a comprehensive noise benchmarking protocol for Ta$_2$O$_5$ memristors, revealing the variability of noise levels and demonstrating a method to significantly reduce noise through voltage cycling and subthreshold reconfiguration.

Contribution

It presents a novel noise benchmarking and reduction protocol that tracks voltage-dependent noise characteristics and enables noise suppression in memristors.

Findings

Broad variability in noise levels behind reproducible switching cycles

Voltage-boosted fluctuations identified in subthreshold voltage region

Highly denoised states achieved within a few subthreshold cycles

Abstract

Reproducibility, endurance, driftless data retention, and fine resolution of the programmable conductance weights are key technological requirements against memristive artificial synapses in neural network applications. However, the inherent fluctuations in the active volume impose severe constraints on the weight resolution. In order to understand and push these limits, a comprehensive noise benchmarking and noise reduction protocol is introduced. Our approach goes beyond the measurement of steady-state readout noise levels and tracks the voltage-dependent noise characteristics all along the resistive switching $I(V)$ curves. Furthermore, we investigate the tunability of the noise level by dedicated voltage cycling schemes in our filamentary Ta$_2$O$_5$ memristors. This analysis highlights a broad, order-of-magnitude variability of the possible noise levels behind seemingly reproducible switching cycles. Our nonlinear noise spectroscopy measurements identify a subthreshold voltage region with voltage-boosted fluctuations. This voltage range enables the reconfiguration of the fluctuators without resistive switching, yielding a highly denoised state within a few subthreshold cycles.