Harnessing Nonidealities in Analog In-Memory Computing Circuits: A Physical Modeling Approach for Neuromorphic Systems

TL;DR

This paper introduces a physical modeling approach for analog in-memory computing circuits using ODE-based neural networks, enabling large-scale, energy-efficient deep learning by exploiting hardware nonidealities and reducing computational costs.

Contribution

It proposes a novel ODE-based physical neural network framework with differentiable spike-time discretization for efficient training of large-scale IMC models.

Findings

DSTD reduces training computational cost by up to 20 times in speed and 100 times in memory.

Large-scale networks exploiting hardware nonidealities improve learning performance on CIFAR-10.

Post-layout SPICE simulations validate the model's accuracy and robustness against circuit nonidealities.

Abstract

Large-scale deep learning models are increasingly constrained by their immense energy consumption, limiting their scalability and applicability for edge intelligence. In-memory computing (IMC) offers a promising solution by addressing the von Neumann bottleneck inherent in traditional deep learning accelerators, significantly reducing energy consumption. However, the analog nature of IMC introduces hardware nonidealities that degrade model performance and reliability. This paper presents a novel approach to directly train physical models of IMC, formulated as ordinary-differential-equation (ODE)-based physical neural networks (PNNs). To enable the training of large-scale networks, we propose a technique called differentiable spike-time discretization (DSTD), which reduces the computational cost of ODE-based PNNs by up to 20 times in speed and 100 times in memory. We demonstrate that such large-scale networks enhance the learning performance by exploiting hardware nonidealities on the CIFAR-10 dataset. The proposed bottom-up methodology is validated through the post-layout SPICE simulations on the IMC circuit with nonideal characteristics using the sky130 process. The proposed PNN approach reduces the discrepancy between the model behavior and circuit dynamics by at least an order of magnitude. This work paves the way for leveraging nonideal physical devices, such as non-volatile resistive memories, for energy-efficient deep learning applications.