Commercial CMOS Process for Quantum Computing: Quantum Dots and Charge Sensing in a 22 nm Fully Depleted Silicon-on-Insulator Process
S.V. Amitonov, A. Apr\`a, M. Asker, B. Barry, I. Bashir, P. Bisiaux, E. Blokhina, P. Giounanlis, P. Hanos-Puskai, M. Harkin, I. Kriekouki, D. Leipold, M. Moras, C. Power, N. Samkharadze, A. Sokolov, D. Redmond, C. Rohrbacher, X. Wu

TL;DR
This paper demonstrates the formation, control, and charge sensing of quantum dots in a commercial 22 nm CMOS process, advancing scalable quantum computing architectures using industry-standard fabrication techniques.
Contribution
It shows for the first time that quantum dots and charge sensors can be reliably created and operated in a commercial CMOS process, enabling scalable quantum device integration.
Findings
Quantum dots formed in a commercial CMOS process.
Effective charge sensing with single-electron box sensors.
Controlled coupling and detuning of quantum dots.
Abstract
Confining electrons or holes in quantum dots formed in the channel of industry-standard fully depleted silicon-on-insulator CMOS structures is a promising approach to scalable qubit architectures. In this communication, we present measurement results of a commercial nanostructure fabricated using the GlobalFoundries 22FDX(TM) industrial process. We demonstrate here that quantum dots are formed in the device channel by applying a combination of a back- and gate voltages. We report our results on an effective detuning of the energy levels in the quantum dots by varying the barrier gate voltages in combination with the back-gate voltage. Given the need and importance of scaling to larger numbers of qubits, we demonstrate here the feasibility of single-electron box sensors at the edge of the quantum dot array for effective charge sensing in different operation modes -- sensing charge…
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Taxonomy
TopicsSemiconductor materials and devices · Integrated Circuits and Semiconductor Failure Analysis · Advancements in Semiconductor Devices and Circuit Design
