Testbeam Characterization of a SiGe BiCMOS Monolithic Silicon Pixel Detector with Internal Gain Layer

TL;DR

This paper presents the characterization of a monolithic silicon pixel detector with internal gain, demonstrating high efficiency and excellent time resolution in beam tests, using advanced SiGe BiCMOS technology.

Contribution

It introduces a novel monolithic silicon pixel ASIC with an internal avalanche gain layer, tested with high performance results in a pion beam environment.

Findings

Achieved 99.99% detection efficiency at high bias voltage.

Time resolution improved from 24.3 ps to 12.1 ps after correction.

Demonstrated effective operation across various power densities and bias voltages.

Abstract

A monolithic silicon pixel ASIC prototype, produced in 2024 as part of the Horizon 2020 MONOLITH ERC Advanced project, was tested with a 120 GeV/c pion beam. The ASIC features a matrix of hexagonal pixels with a 100 \mu m pitch, read by low-noise, high-speed front-end electronics built using 130 nm SiGe BiCMOS technology. It includes the PicoAD sensor, which employs a continuous, deep PN junction to generate avalanche gain. Data were taken across power densities from 0.05 to 2.6 W/cm2 and sensor bias voltages from 90 to 180 V. At the highest bias voltage, corresponding to an electron gain of 50, and maximum power density, an efficiency of (99.99 \pm 0.01)% was achieved. The time resolution at this working point was (24.3 \pm 0.2) ps before time-walk correction, improving to (12.1 \pm 0.3) ps after correction.