SRAM-Based PUF Reliability Prediction Using Cell-Imbalance Characterization in the State Space Diagram

TL;DR

This paper introduces a new method to predict SRAM PUF reliability by characterizing cell imbalance in the state space, enabling early-stage design assessment without extensive electrical simulations.

Contribution

It proposes a novel imbalance factor based on state space analysis to estimate startup probabilities, improving early reliability prediction for SRAM PUFs.

Findings

Imbalance factor correlates well with startup probability distributions.

Method validated with experimental data from 65-nm CMOS devices.

Applicable for early design-stage reliability estimation.

Abstract

This work proposes a methodology to estimate the statistical distribution of the probability that a 6T bit-cell starts up to a given logic value in SRAM memories for PUF applications. First, the distribution is obtained experimentally in a 65-nm CMOS device. As this distribution cannot be reproduced by electrical simulation, we explore the use of an alternative parameter defined as the distance between the origin and the separatrix in the bit-cell state space to quantify the mismatch of the cell. The resulting distribution of this parameter obtained from Monte Carlo simulations is then related to the start-up probability distribution using a two-component logistic function. The reported results show that the proposed imbalance factor is a good predictor for PUF-related reliability estimation with the advantage that can be applied at the early design stages.