Enhanced feature encoding and classification on distributed quantum hardware

TL;DR

This paper introduces a novel feature map optimization strategy for Quantum Support Vector Machines tailored for NISQ devices, utilizing parallelization on IBM quantum hardware to improve binary classification in neutrino physics.

Contribution

It proposes a new feature map optimization method considering hardware specifics and demonstrates parallelization of QSVM classification on multiple quantum hardware sub-units.

Findings

Parallelization accelerates quantum classification tasks.

Hardware-specific optimization improves QSVM performance.

Top 20% sub-units retain most classification accuracy.

Abstract

The steady progress of quantum hardware is motivating the search for novel quantum algorithm optimization strategies for near-term, real-world applications. In this study, we propose a novel feature map optimization strategy for Quantum Support Vector Machines (QSVMs), designed to enhance binary classification while taking into account backend-specific parameters, including qubit connectivity, native gate sets, and circuit depth, which are critical factors in noisy intermediate scale quantum (NISQ) devices. The dataset we utilised belongs to the neutrino physics domain, with applications in the search for neutrinoless double beta decay. A key contribution of this work is the parallelization of the classification task to commercially available superconducting quantum hardware to speed up the genetic search processes. The study was carried out by partitioning each quantum processing unit (QPU) into several sub-units with the same topology to implement individual QSVM instances. We conducted parallelization experiments with three IBM backends with more than 100 qubits, ranking the sub-units based on their susceptibility to noise. Data-driven simulations show how, under certain restrictions, parallelized genetic optimization can occur with the tested devices when retaining the top 20% ranked sub-units in the QPU.