On the Role of Noise in Factorizers for Disentangling Distributed Representations

TL;DR

This paper investigates how noise application at different stages affects the ability of vector-symbolic architectures to factorize high-dimensional representations, enhancing their robustness and implementation flexibility.

Contribution

It introduces a method to relax the noise requirement in factorizer architectures by applying noise only during initialization, broadening hardware implementation options.

Findings

Initialization noise suffices for small factors, iterative noise becomes better as factors increase.

Both noise strategies extend operational capacity by at least 50 times.

The approach improves the robustness of vector-symbolic architectures in factorization tasks.

Abstract

To efficiently factorize high-dimensional distributed representations to the constituent atomic vectors, one can exploit the compute-in-superposition capabilities of vector-symbolic architectures (VSA). Such factorizers however suffer from the phenomenon of limit cycles. Applying noise during the iterative decoding is one mechanism to address this issue. In this paper, we explore ways to further relax the noise requirement by applying noise only at the time of VSA's reconstruction codebook initialization. While the need for noise during iterations proves analog in-memory computing systems to be a natural choice as an implementation media, the adequacy of initialization noise allows digital hardware to remain equally indispensable. This broadens the implementation possibilities of factorizers. Our study finds that while the best performance shifts from initialization noise to iterative noise as the number of factors increases from 2 to 4, both extend the operational capacity by at least 50 times compared to the baseline factorizer resonator networks. Our code is available at: https://github.com/IBM/in-memory-factorizer