Dataflow Optimized Reconfigurable Acceleration for FEM-based CFD Simulations

TL;DR

This paper presents a reconfigurable FPGA-based accelerator for FEM-based CFD simulations that significantly improves performance and reduces latency and power consumption compared to traditional CPU implementations.

Contribution

It introduces a high-performance FPGA accelerator for FEM-based Navier-Stokes equations solving, utilizing High-Level Synthesis for flexibility and efficiency.

Findings

7.9x higher performance than optimized Vitis-HLS implementations

45% lower latency than CPU software implementation

3.64x less power consumption compared to high-end server CPU

Abstract

Computational Fluid Dynamics (CFD) simulations are essential for analyzing and optimizing fluid flows in a wide range of real-world applications. These simulations involve approximating the solutions of the Navier-Stokes differential equations using numerical methods, which are highly compute- and memory-intensive due to their need for high-precision iterations. In this work, we introduce a high-performance FPGA accelerator specifically designed for numerically solving the Navier-Stokes equations. We focus on the Finite Element Method (FEM) due to its ability to accurately model complex geometries and intricate setups typical of real-world applications. Our accelerator is implemented using High-Level Synthesis (HLS) on an AMD Alveo U200 FPGA, leveraging the reconfigurability of FPGAs to offer a flexible and adaptable solution. The proposed solution achieves 7.9x higher performance than optimized Vitis-HLS implementations and 45% lower latency with 3.64x less power compared to a software implementation on a high-end server CPU. This highlights the potential of our approach to solve Navier-Stokes equations more effectively, paving the way for tackling even more challenging CFD simulations in the future.