A 400Gbit Ethernet core enabling High Data Rate Streaming from FPGAs to Servers and GPUs in Radio Astronomy

TL;DR

This paper presents a 400GbE Ethernet core and streaming techniques that enable high data rate transfer from FPGAs to GPUs, significantly improving real-time processing capabilities for radio astronomy applications.

Contribution

The paper introduces a novel 400GbE Ethernet core and streaming methods that enhance data transfer efficiency from FPGAs to GPUs in radio astronomy systems.

Findings

Achieved high-speed data streaming from FPGA to GPU using new techniques.

Developed an open-source UDP/IPv4 400GbE wrapper for FPGA-to-GPU transfer.

Reduced hardware complexity, power, and cost for radio astronomy data processing.

Abstract

The increased bandwidth coupled with the large numbers of antennas of several new radio telescope arrays has resulted in an exponential increase in the amount of data that needs to be recorded and processed. In many cases, it is necessary to process this data in real time, as the raw data volumes are too high to be recorded and stored. Due to the ability of graphics processing units (GPUs) to process data in parallel, GPUs are increasingly used for data-intensive tasks. In most radio astronomy digital instrumentation (e.g. correlators for spectral imaging, beamforming, pulsar, fast radio burst and SETI searching), the processing power of modern GPUs is limited by the input/output data rate, not by the GPU's computation ability. Techniques for streaming ultra-high-rate data to GPUs, such as those described in this paper, reduce the number of GPUs and servers needed, and make significant reductions in the cost, power consumption, size, and complexity of GPU based radio astronomy backends. In this research, we developed and tested several different techniques to stream data from network interface cards (NICs) to GPUs. We also developed an open-source UDP/IPv4 400GbE wrapper for the AMD/Xilinx IP demonstrating high-speed data stream transfer from a field programmable gate array (FPGA) to GPU.