Teaching Experiences using the RVfpga Package
D. Chaver, S. Harris, L. Pinuel, O. Kindgren, R. Kravitz, J. I. Gomez, F. Castro, K. Olcoz, J. Villalba, A. Grinshpun, F. Gabbay, L. Seed, R. Duarte, M. Lopez, O. Alonso, R. Owen

TL;DR
This paper discusses the use of the RVfpga package for teaching computer architecture with RISC-V and FPGA, highlighting its integration into curricula, various teaching activities, and its alignment with current computing education standards.
Contribution
It introduces the RVfpga course as a practical teaching tool, detailing its implementation in diverse educational settings and comparing it with similar courses.
Findings
RVfpga effectively supports hands-on learning in computer architecture.
The course aligns with current IEEE/ACM/AAAI curriculum guidelines.
Multiple teaching activities and workshops successfully utilize RVfpga.
Abstract
The RVfpga course offers a solid introduction to computer architecture using the RISC-V instruction set and FPGA technology. It focuses on providing hands-on experience with real-world RISC-V cores, the VeeR EH1 and the VeeR EL2, developed by Western Digital a few years ago and currently hosted by ChipsAlliance. This course is particularly aimed at educators and students in computer science, computer engineering, and related fields, enabling them to integrate practical RISC-V knowledge into their curricula. The course materials, which include detailed labs and setup guides, are available for free through the Imagination University Programme website. We have used RVfpga in different teaching activities and we plan to continue using it in the future. Specifically, we have used RVfpga as the main experimental platform in several bachelor/master degree courses; we have completed several…
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