GraCo -- A Graph Composer for Integrated Circuits

TL;DR

GraCo is a novel reinforcement learning-based graph composer for integrated circuit synthesis that efficiently constructs circuit graphs, incorporates prior knowledge, and outperforms random baselines in designing standard cells.

Contribution

Introduces GraCo, a configurable RL framework for IC design that leverages prior knowledge and consistency checks to improve synthesis efficiency and performance.

Findings

GraCo requires 5x fewer sampling steps than random baseline for inverter design.

GraCo synthesizes a NAND2 gate that is 2.5x faster.

GraCo successfully generates standard cells like inverter and NAND2.

Abstract

Designing integrated circuits involves substantial complexity, posing challenges in revealing its potential applications - from custom digital cells to analog circuits. Despite extensive research over the past decades in building versatile and automated frameworks, there remains open room to explore more computationally efficient AI-based solutions. This paper introduces the graph composer GraCo, a novel method for synthesizing integrated circuits using reinforcement learning (RL). GraCo learns to construct a graph step-by-step, which is then converted into a netlist and simulated with SPICE. We demonstrate that GraCo is highly configurable, enabling the incorporation of prior design knowledge into the framework. We formalize how this prior knowledge can be utilized and, in particular, show that applying consistency checks enhances the efficiency of the sampling process. To evaluate its performance, we compare GraCo to a random baseline, which is known to perform well for smaller design space problems. We demonstrate that GraCo can discover circuits for tasks such as generating standard cells, including the inverter and the two-input NAND (NAND2) gate. Compared to a random baseline, GraCo requires 5x fewer sampling steps to design an inverter and successfully synthesizes a NAND2 gate that is 2.5x faster.