Static Reuse Profile Estimation for Array Applications
Abdur Razzak, Atanu Barai, Nandakishore Santhi, Abdel-Hameed A., Badawy

TL;DR
This paper introduces a static analysis method to estimate reuse profiles of array applications at compile time, enabling accurate cache hit rate predictions without runtime tracing.
Contribution
It presents a novel static analysis technique that predicts reuse profiles and cache performance for loop-based programs by analyzing LLVM IR and extrapolating from small loop bounds.
Findings
Achieves 95% average accuracy in cache hit rate prediction
Uses recursive algorithms and loop unrolling for profile estimation
Provides a faster alternative to dynamic trace-based methods
Abstract
Reuse distance analysis is a widely recognized method for application characterization that illustrates cache locality. Although there are various techniques to calculate the reuse profile from dynamic memory traces, it is both time and space-consuming due to the requirement to collect dynamic memory traces at runtime. In contrast, static analysis reuse profile estimation is a promisingly faster approach since it is calculated at compile time without running the program or collecting memory traces. This work presents a static analysis technique to estimate the reuse profile of loop-based programs. For an input program, we generate a basic block-level control flow graph and the execution count by analyzing the LLVM IR of the program. We present the memory accesses of the application kernel in a compact bracketed format and use a recursive algorithm to predict the reuse distance…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsEmbedded Systems Design Techniques
