Self-testing quantum randomness expansion on an integrated photonic chip

TL;DR

This paper demonstrates a self-testing quantum random number generator on an integrated photonic chip, capable of certifying randomness with minimal assumptions, paving the way for scalable, miniaturized quantum security devices.

Contribution

The work introduces a novel integrated photonic chip implementing a self-testing QRNG with high randomness output and noise tolerance, using a measurement-device-independent protocol.

Findings

Generated 15.33 Mbits of certifiable randomness per run

Achieved an expansion rate of 5.11×10⁻⁴ at 10 MHz

Enabled potential for scalable, miniaturized quantum random number generators

Abstract

The power of quantum random number generation is more than just the ability to create truly random numbers$\unicode{x2013}$it can also enable self-testing, which allows the user to verify the implementation integrity of certain critical quantum components with minimal assumptions. In this work, we develop and implement a self-testing quantum random number generator (QRNG) chipset capable of generating 15.33 Mbits of certifiable randomness in each run (an expansion rate of $5.11\times 10^{-4}$ at a repetition rate of 10 Mhz). The chip design is based on a highly loss-and-noise tolerant measurement-device-independent protocol, where random coherent states encoded using quadrature phase shift keying are used to self-test the quantum homodyne detection unit: well-known to be challenging to characterise in practice. Importantly, this proposal opens up the possibility to implement miniaturised self-testing QRNG devices at production scale using standard silicon photonics foundry platforms.