SILVIA: Automated Superword-Level Parallelism Exploitation via HLS-Specific LLVM Passes for Compute-Intensive FPGA Accelerators

TL;DR

SILVIA is an LLVM-based tool that automatically detects superword-level parallelism in HLS designs and efficiently packs multiple operations into DSPs, significantly reducing resource usage in FPGA accelerators.

Contribution

It introduces an open-source LLVM pass that automates DSP resource optimization in HLS designs without manual code changes.

Findings

Reduced DSP utilization by 70% for additions

Cut DSP usage by 50% for multiplications and MACs

Effective across diverse neural network and linear algebra accelerators

Abstract

High-level synthesis (HLS) aims at democratizing custom hardware acceleration with highly abstracted software-like descriptions. However, efficient accelerators still require substantial low-level hardware optimizations, defeating the HLS intent. In the context of field-programmable gate arrays, digital signal processors (DSPs) are a crucial resource that typically requires a significant optimization effort for its efficient utilization, especially when used for sub-word vectorization. This work proposes SILVIA, an open-source LLVM transformation pass that automatically identifies superword-level parallelism within an HLS design and exploits it by packing multiple operations, such as additions, multiplications, and multiply-and-adds, into a single DSP. SILVIA is integrated in the flow of the commercial AMD Vitis HLS tool and proves its effectiveness by packing multiple operations on the DSPs without any manual source-code modifications on several diverse state-of-the-art HLS designs such as convolutional neural networks and basic linear algebra subprograms accelerators, reducing the DSP utilization for additions by 70 % and for multiplications and multiply-and-adds by 50 % on average.