A System Level Performance Evaluation for Superconducting Digital Systems

TL;DR

This paper evaluates the system-level performance benefits of superconducting digital technology for large-scale compute workloads, demonstrating significant improvements in energy efficiency and computational power for LLM training and inference.

Contribution

It introduces a cross-layer modeling approach to assess SCD architectures, highlighting their potential to overcome current memory and interconnect limitations.

Findings

Substantial performance gains in LLM training and inference

Reduced energy consumption through SCD technology

Addressing memory and interconnect bottlenecks

Abstract

Superconducting Digital (SCD) technology offers significant potential for enhancing the performance of next generation large scale compute workloads. By leveraging advanced lithography and a 300 mm platform, SCD devices can reduce energy consumption and boost computational power. This paper presents a cross-layer modeling approach to evaluate the system-level performance benefits of SCD architectures for Large Language Model (LLM) training and inference. Our findings, based on experimental data and Pulse Conserving Logic (PCL) design principles, demonstrate substantial performance gain in both training and inference. We are, thus, able to convincingly show that the SCD technology can address memory and interconnect limitations of present day solutions for next-generation compute systems.