Trapped-ion quantum simulation of the Fermi-Hubbard model as a lattice gauge theory using hardware-aware native gates

TL;DR

This paper demonstrates a hardware-aware quantum simulation of the Fermi-Hubbard model on a trapped-ion system, employing co-design strategies to reduce gate count and enhance error mitigation, enabling deeper simulations on NISQ devices.

Contribution

It introduces novel algorithm-hardware co-design techniques, including IPG and entropy compression, to optimize circuit compilation and error mitigation for simulating strongly correlated systems.

Findings

Reduced 2-qubit gate count by 35%

Doubled the number of Trotter steps feasible on hardware

Enhanced error mitigation through symmetry-based techniques

Abstract

The Fermi-Hubbard model (FHM) is a simple yet rich model of strongly interacting electrons with complex dynamics and a variety of emerging quantum phases. These properties make it a compelling target for digital quantum simulation. Trotterization-based quantum simulations have shown promise, but implementations on current hardware are limited by noise, necessitating error mitigation techniques like circuit optimization and post-selection. A mapping of the FHM to a Z2 LGT was recently proposed that restricts the dynamics to a subspace protected by additional symmetries, and its ability for post-selection error mitigation was verified through noisy classical simulations. In this work, we propose and demonstrate a suite of algorithm-hardware co-design strategies on a trapped-ion quantum computer, targeting two key aspects of NISQ-era quantum simulation: circuit compilation and error mitigation. In particular, a novel combination of iteratively preconditioned gradient descent (IPG) and subsystem von Neumann Entropy compression reduces the 2-qubit gate count of FHM quantum simulation by 35%, consequently doubling the number of simulatable Trotter steps when used in tandem with error mitigation based on conserved symmetries, debiasing and sharpening techniques. Our work demonstrates the value of algorithm-hardware co-design to operate digital quantum simulators at the threshold of maximum circuit depths allowed by current hardware, and is broadly generalizable to strongly correlated systems in quantum chemistry and materials science.