Convolutional Differentiable Logic Gate Networks
Felix Petersen, Hilde Kuehne, Christian Borgelt, Julian Welzel,, Stefano Ermon

TL;DR
This paper introduces an advanced convolutional logic gate network architecture that enhances scalability and efficiency, achieving high accuracy on CIFAR-10 with significantly fewer parameters compared to state-of-the-art models.
Contribution
It extends differentiable logic gate networks with deep convolutions, logical pooling, and residuals, enabling larger models and improved performance.
Findings
Achieved 86.29% accuracy on CIFAR-10
Reduced model size by 29 times compared to SOTA
Scaled logic gate networks by over an order of magnitude
Abstract
With the increasing inference cost of machine learning models, there is a growing interest in models with fast and efficient inference. Recently, an approach for learning logic gate networks directly via a differentiable relaxation was proposed. Logic gate networks are faster than conventional neural network approaches because their inference only requires logic gate operators such as NAND, OR, and XOR, which are the underlying building blocks of current hardware and can be efficiently executed. We build on this idea, extending it by deep logic gate tree convolutions, logical OR pooling, and residual initializations. This allows scaling logic gate networks up by over one order of magnitude and utilizing the paradigm of convolution. On CIFAR-10, we achieve an accuracy of 86.29% using only 61 million logic gates, which improves over the SOTA while being 29x smaller.
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Taxonomy
TopicsLow-power high-performance VLSI design · Interconnection Networks and Systems · Quantum Computing Algorithms and Architecture
