Hardware for converting floating-point to the microscaling (MX) format

TL;DR

This paper introduces hardware converters for the MX-format, a compact representation of floating-point numbers, supporting multiple formats and enabling efficient conversion from 32 single-precision floats.

Contribution

It presents an algorithm and FPGA hardware model for converting 32 floating-point numbers to various MX-format types, supporting six different formats.

Findings

Hardware converters successfully implemented on FPGA.

Conversion process is efficient with three main steps.

Experimental results demonstrate effective performance.

Abstract

This paper proposes hardware converters for the microscaling format (MX-format), a reduced representation of floating-point numbers. We present an algorithm and a memory-free hardware model for converting 32 single-precision floating-point numbers to MX-format. The proposed model supports six different types of MX-format: E5M2, E4M3, E3M2, E2M3, E2M1, and INT8. The conversion process consists of three steps: calculating the maximum absolute value among 32 inputs, generating a shared scale, and producing 32 outputs in the selected MX-format type. The hardware converters were implemented in FPGA, and experimental results demonstrate.