Noise-Aware Circuit Compilations for a Continuously Parameterized Two-Qubit Gateset

TL;DR

This paper presents noise-aware circuit compilation techniques for continuously parameterized two-qubit gates on trapped-ion quantum processors, improving performance and quantum volume through hardware-specific optimizations.

Contribution

It introduces novel compilation strategies tailored for continuously parameterized two-qubit gates on trapped-ion hardware, enhancing noise resilience and circuit efficiency.

Findings

Improved quantum volume achieved with noise-aware compilation.

Optimizations reduce total entangling angle and circuit depth.

Distinct error channel impacts analyzed for different compilation methods.

Abstract

State-of-the-art noisy-intermediate-scale quantum (NISQ) processors are currently implemented across a variety of hardware platforms, each with their own distinct gatesets. As such, circuit compilation should not only be aware of, but also deeply connect to, the native gateset and noise properties of each. Trapped-ion processors are one such platform that provides a gateset that can be continuously parameterized across both one- and two-qubit gates. Here we use the Quantum Scientific Computing Open User Testbed (QSCOUT) to study noise-aware compilations focused on continuously parameterized two-qubit $\mathcal{ZZ}$ gates (based on the M{\o}lmer-S{\o}rensen interaction) using $\textbf{Superstaq}$, a quantum software platform for hardware-aware circuit compiler optimizations. We discuss the realization of $\mathcal{ZZ}$ gates with arbitrary angle on the all-to-all connected trapped-ion system. Then we discuss a variety of different compiler optimizations that innately target these $\mathcal{ZZ}$ gates and their noise properties. These optimizations include moving from a restricted maximally entangling gateset to a continuously parameterized one, swap mirroring to further reduce total entangling angle of the operations, focusing the heaviest $\mathcal{ZZ}$ angle participation on the best performing gate pairs, and circuit approximation to remove the least impactful $\mathcal{ZZ}$ gates. We demonstrate these compilation approaches on the hardware with randomized quantum volume circuits, observing the potential to realize a larger quantum volume as a result of these optimizations. Using differing yet complementary analysis techniques, we observe the distinct improvements in system performance provided by these noise-aware compilations and study the role of stochastic and coherent error channels for each compilation choice.