Inference-to-complete: A High-performance and Programmable Data-plane Co-processor for Neural-network-driven Traffic Analysis
Dong Wen, Zhongpei Liu, Tong Yang, Tao Li, Tianyun Li, Chenglong Li,, Jie Li, Zhigang Sun

TL;DR
Kaleidoscope is a flexible, high-performance data-plane co-processor enabling neural network inference for traffic analysis, achieving low latency and high throughput without disrupting data-plane operations.
Contribution
The paper introduces Kaleidoscope, a novel programmable co-processor that supports diverse neural networks with scalable inference engines and raw-byte-based NNs, ensuring flexibility, performance, and data-plane unawareness.
Findings
Achieves 256-352 ns inference latency and 100 Gbps throughput.
Supports complex NNs with high accuracy for different flow types.
Demonstrates negligible impact on data-plane performance.
Abstract
Neural-networks-driven intelligent data-plane (NN-driven IDP) is becoming an emerging topic for excellent accuracy and high performance. Meanwhile we argue that NN-driven IDP should satisfy three design goals: the flexibility to support various NNs models, the low-latency-high-throughput inference performance, and the data-plane-unawareness harming no performance and functionality. Unfortunately, existing work either over-modify NNs for IDP, or insert inline pipelined accelerators into the data-plane, failing to meet the flexibility and unawareness goals. In this paper, we propose Kaleidoscope, a flexible and high-performance co-processor located at the bypass of the data-plane. To address the challenge of meeting three design goals, three key techniques are presented. The programmable run-to-completion accelerators are developed for flexible inference. To further improve performance,…
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Taxonomy
TopicsNeural Networks and Applications · Traffic Prediction and Management Techniques · Electrostatic Discharge in Electronics
